View LR38516_214022.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LR38516
LR38516
DESCRIPTION
The LR38516 is a CMOS timing generator IC which is designed for video-camcorders, and which generates timing pulses for driving 350 k-pixel progressive scan color CCD area sensors, synchronous pulses for TV signals and processing pulses for video signals.
Timing Generator IC for 350 k-pixel Progressive Scan Color CCDs
PIN CONNECTIONS
48-PIN QFP TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37 VTAX 1 VTBX 2 VTCX 3 VTDX 4 OFDX 5 VDD3 6 GND 7 VHAX 8 VHCX 9 ID 10 WEN 11 TST1 12 13 14 15 16 17 18 19 20 21 22 23 24 PBLK BCPX BPX CLPX GND FCDS FS VDD5 RS FR GND TST2 36 TST3 35 ED2 34 ED1 33 ED0 32 HD 31 GND 30 VDD3 29 DMVD 28 DCLK 27 CLK 26 CKO 25 CKI
FEATURES
* Designed for 350 k-pixel progressive scan color CCD area sensors * Frame rate : 30 frame/s * Shutter speed can be controlled in 1H period using a serial code * TV mode selection, power mode selection and the phase selection of DCLK can be also controlled by using a serial code * +3 V, +4.5 V and +5 V power supplies * Package : 48-pin QFP (QFP048-P-0707) 0.5 mm pin-pitch
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
1
DBLK GND ADCK NC VDD4 FH2 GND FH1 VDD4 CLRX CCD2 CCD1
(QFP048-P-0707)
LR38516
BLOCK DIAGRAM
DMVD DCLK TST3 GND CKO VDD3 CLK ED2 ED1 ED0 CKI 25 OSC CCD1 37 CCD2 38 CLRX 39 VDD4 40 FH1 41 GND 42 FH2 43 VDD4 44 NC 45 ADCK 46 V COUNTER GND 47 DBLK 48 14 BCPX 13 PBLK RESET DECODER LEVEL SHIFTER 1/2 H COUNTER RESET GATE DATA LATCH & SHUTTER CONTROL 24 TST2 23 GND 22 FR 21 RS 20 VDD5 19 FS 18 FCDS 17 GND 16 CLPX 15 BPX 12 TST1 HD 32
36
35
34
33
31
30
29
28
27
26
1/2
1/2
RESET
1 VTAX
2 VTBX
3 VTCX
4 VTDX
5 OFDX
6 VDD3
7 GND
8 VHAX
9 VHCX
10 ID
11 WEN
2
LR38516
PIN DESCRIPTION
PIN NO. SYMBOL 1 VTAX I/O O3 POLARITY PIN NAME Vertical transfer pulse output 1 Vertical transfer pulse output 2 Vertical transfer pulse output 3 Vertical transfer pulse output 4 DESCRIPTION A vertical transfer pulse for CCD. Connect to V1AX pin of the vertical driver IC. For details, see "CONNECTION OF VERTICAL TRANSFER PULSES". A vertical transfer pulse for CCD. Connect to V2AX pin of the vertical driver IC. For details, see "CONNECTION OF VERTICAL TRANSFER PULSES". A vertical transfer pulse for CCD. Connect to V3AX pin of the vertical driver IC. For details, see "CONNECTION OF VERTICAL TRANSFER PULSES". A vertical transfer pulse for CCD. Connect to V4AX pin of the vertical driver IC. For details, see "CONNECTION OF VERTICAL TRANSFER PULSES". A pulse that sweeps the charge of the photo-diode 5 OFDX O3 OFD pulse output for the electronic shutter. Connect to OFD pin of CCD through the vertical driver IC and DC offset circuit. Held at H level at normal mode. Supply of +3 V power. A grounding pin. A pulse that transfers the charge of the photo-diode to the vertical shift register. For details, see "CONNECTION OF VERTICAL TRANSFER PULSES". A pulse that transfers the charge of the photo-diode to the vertical shift register. For details, see "CONNECTION OF VERTICAL TRANSFER PULSES". The pulse is used in color separator. The signal switches H and L at every line. H : R color line L : B color line Write enable output for low-speed shutter pulse. A test pin. Set open or to L level in the normal mode. A pulse that corresponds to the cease period of the horizontal transfer pulse. A pulse to clamp the optical black signal. Output stays low during the absence of effective pixels within the vertical blanking. A pulse to clamp the signal. The phase is same as BCPX (pin 14). This pulse is continuous at horizontal cycle. A pulse to clamp the dummy outputs of CCD. The pulse stays high during the sweep-out period. A grounding pin.
2
VTBX
O3
3
VTCX
O3
4
VTDX
O3
6 7 8
VDD3 GND VHAX
- - O3
- -
Power supply Ground Readout pulse output 1 Readout pulse output 3
9
VHCX
O3
10
ID
O3
Line index pulse output Write enable output - Test pin 1 Pre-blanking pulse output Optical black clamp pulse output Clamp pulse output Clamp pulse output - Ground
11 12 13
WEN TST1 PBLK
O3 ICD3 O5
14
BCPX
O5
15 16 17
BPX CLPX GND
O5 O5 -
3
LR38516
PIN NO. SYMBOL 18 FCDS I/O O6MA5 POLARITY PIN NAME CDS pulse output 1 DESCRIPTION A pulse to clamp the feed-through level from CCD. The polarity can be changed by serial data. The output phase of FCDS is selected by serial data. A pulse to sample-hold the signal from CCD. 19 20 21 FS VDD5 RS O6MA5 - O6MA5 - CDS pulse output 2 Power supply S/H pulse output The polarity can be changed by serial data. The output phase of FS is selected by serial data. Supply of +5 V power. A pulse to sample-hold the signal from CDS circuit. The polarity can be changed by serial data. The output phase of RS is selected by serial data. A pulse to reset the charge of output circuit. 22 23 24 FR GND TST2 O6MA52 - ICD3 - - Reset pulse output Ground Test pin 2 Connect to OR pin of CCD through the DC offset circuit. The output phase of FR is selected by serial data. A grounding pin. A test pin. Set open or to L level in the normal mode. An input pin for reference clock oscillation. Connect to CKO (pin 26) with R. Frequency : 24.54545 MHz (1 560 fH) fH = Horizontal frequency 26 CKO OSCO3 - Clock output An output pin for reference clock oscillation. The output is the inverse of CKI (pin 25). An output pin to generate HD and VD pulses. Connect to clock input pin of SSG IC. Frequency : 12.27273 MHz (780 fH) 28 DCLK O6MA3 Clock output Vertical reference - - pulse input Power supply Ground An output pin for DSP IC. The output phase of DCLK is selected by serial data step by 90. Frequency : 12.27273 MHz (780 fH) An input pin for reference of vertical pulse. Connect to VD pin of DSP IC. Supply of +3 V power. A grounding pin.
25
CKI
OSCI3
-
Clock input
27
CLK
O6MA3
Clock output
29 30 31 32 33
DMVD VDD3 GND HD ED0
IC3 - - IC3 IC3 -
Horizontal reference An input pin for reference of horizontal pulse. pulse input Connect to HD pin of DSP IC. Strobe pulse input Shift register clock input Shift register data input Test pin 3 An input pin for the strobe pulse, to control the functions of LR38516. For details, see "Serial Data Control". An input pin for the clock of the shift register, to control the functions of LR38516. For details, see "Serial Data Control". An input pin for the data of the shift register, to control the functions of LR38516. For details, see "Serial Data Control". A test pin. Set open or to L level in the normal mode.
34
ED1
IC3
-
35 36
ED2 TST3
IC3 ICD3
- -
4
LR38516
PIN NO. SYMBOL 37 CCD1 I/O ICU4 POLARITY - PIN NAME CCD selection input 1 DESCRIPTION An input pin to select CCD. At CCD1 = H and CCD2 = H 1/4-type 350 k-pixel CCD (at NTSC) At CCD1 = H and CCD2 = L 1/3-type 350 k-pixel CCD (at NTSC) An input pin for resetting all serial data at power on. 39 40 41 42 43 44 45 46 47 48 CLRX VDD4 FH1 GND FH2 VDD4 NC ADCK GND DBLK
: : : : : :
38
CCD2
ICU4
-
CCD selection input 2
ICU4 - O6MA43 - O6MA43 - - O6MA4 - O3
- -
Data clear input Power supply Horizontal transfer pulse output 1
Connect VDD through the diode and GND through the capacitor. Supply of +4.5 V power. A horizontal transfer pulse for CCD. Connect to OH1 pin of CCD. A grounding pin. A horizontal transfer pulse for CCD. Connect to OH2 pin of CCD. Supply of +4.5 V power. No connection. An output pin for A/D converter. The output phase of ADCK is selected by serial data step by 90. A grounding pin. Composite blanking pulse. Vertical : 33H period
O6MA43 O5 O6MA5 O6MA52 OSCI3 OSCO3 : : : : : : Output pin Output pin Output pin Output pin Input pin for oscillation Output pin for oscillation
-
Ground Horizontal transfer pulse output 2 Power supply No connection AD clock output
- -
-
Ground Dummy composite output
IC3 ICU4 ICD3 O3 O6MA3 O6MA4
Input pin (CMOS level) Input pin (CMOS level with pull-up resistor) Input pin (CMOS level with pull-down resistor) Output pin Output pin Output pin
CONNECTION OF VERTICAL TRANSFER PULSES
OUTPUT PULSE VTAX VHAX VTCX VHCX VTBX VTDX LEVEL SHIFT, INVERT, MIX 3-level pulse with V driver 3-level pulse with V driver 2-level pulse with V driver 2-level pulse with V driver 1/4-TYPE 350 k OV3B OV3A OV2 OV1 1/3-TYPE 350 k, 380 k AND 450 k OV1 OV3 OV2 OV4
5
LR38516
Serial Data Control
SERIAL DATA INPUT TIMING
ED0 ED1 D00 D01 D02 D03 D04 D05 D06 D07 D08 D09 D10 ... D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26
ED2
The data on ED2 is latched in the register at the rising edge of ED1. The data of D13 is effective. Other data are effective at next horizontal line of readout horizontal SERIAL DATA INPUTS
DATA D00-D09 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 NAME SD0-SD9 SMD0 SMD1 TVMD PWSA ML1 ML2 MA1 MA2 PLCH MR1 MR2 MC1 MC2 MS1 MS2 MF1 MF2 Phase control Polarity control of FCDS, FS and RS pulses FUNCTION Electronic shutter speed control
line while VHAX and VHCX are active. ED0 has to be kept L level in effective data input period.
DATA = L -
DATA = H AT CLRX = L All L L L - Power save - L - L L L L Positive - - - - L L L L L L L L L
Electronic shutter mode control TV mode selection Power save control NTSC Normal
-
Phase control - Negative
6
LR38516
ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply voltage Input voltage Output voltage Operating temperature Storage temperature SYMBOL VDD3, VDD4, VDD5 VI3 VI4 VO3 VO4 VO5 TOPR TSTG RATING -0.3 to +6.0 -0.3 to VDD3 + 0.3 -0.3 to VDD4 + 0.3 -0.3 to VDD3 + 0.3 -0.3 to VDD4 + 0.3 -0.3 to VDD5 + 0.3 -20 to +70 -55 to +150 UNIT V V V V V V C C
ELECTRICAL CHARACTERISTICS DC Characteristics (VDD3 = 3.00.3 V, VDD4 = 4.50.45 V, VDD5 = 5.00.5 V, TOPR = -20 to +70 C)
PARAMETER Input "Low" voltage Input "High" voltage Input "Low" voltage Input "High" voltage Input "Low" current Input "High" current Input "Low" current Input "High" current Input "Low" current Input "High" current Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage SYMBOL VIL3 VIH3 VIL4 VIH4 |IIL3-1| |IIH3-1| |IIL3-2| |IIH3-2| |IIL4| |IIH4| VOL3-1 VOH3-1 VOL3-2 VOH3-2 VOL3-3 VOH3-3 VOL4-1 VOH4-1 VOL4-2 VOH4-2 VOL5-1 VOH5-1 VOL5-2 VOH5-2 VOL5-3 VOH5-3 CONDITIONS MIN. 0.8VDD3 0.8VDD4 VI = 0 V VI = VDD3 VI = 0 V VI = VDD3 VI = 0 V VI = VDD4 IOL = 2 mA IOH = -2 mA IOL = 2 mA IOH = -1 mA IOL = 3 mA IOH = -3 mA IOL = 4 mA IOH = -4 mA IOL = 12 mA IOH = -12 mA IOL = 4 mA IOH = -2 mA IOL = 6 mA IOH = -6 mA IOL = 12 mA IOH = -12 mA
6. 7. 8. 9. 10. 11. Applied Applied Applied Applied Applied Applied to to to to to to
TYP.
2.0 4.0
VDD3 - 0.5 VDD3 - 0.5 VDD3 - 0.5 VDD4 - 0.5 VDD4 - 0.5 VDD5 - 0.5 VDD5 - 0.5 VDD5 - 0.5
output output output output output output (O6MA3). (O6MA4). (O6MA43). (O5). (O6MA5). (O6MA52).
MAX. UNIT V 0.2VDD3 V V 0.2VDD4 V A 1.0 A 1.0 A 1.0 A 30 A 60 A 2.0 V 0.4 V V 0.4 V V 0.4 V V 0.4 V V 0.4 V V 0.4 V V 0.4 V 0.4 V V
NOTE 1, 2 3 1 2 3 4 5 6 7 8 9 10 11
NOTES :
Applied to inputs (IC3, OSCI3). Applied to input (ICD3). Applied to input (ICU4). Applied to output (OSCO3). (Output (OSCO3) measures on condition that input (OSCI3) level is 0 V or VDD3.) 5. Applied to output (O3). 1. 2. 3. 4.
7
PACKAGES FOR CCD AND CMOS DEVICES
PACKAGE
48 QFP (QFP048-P-0707)
(Unit : mm)
0.5TYP. 36 M 37 0.08
0.20.08 (1.0) 25 24 7.00.2 9.00.3
0.150.05
1 (1.0)
7.00.2 9.00.3
12 (1.0)
(1.0)
48
13
0.650.2 1.450.2 0.10.1
8
Package base plane
8.00.2
0.1

▲Up To Search▲

Price & Availability of LR38516

	To Download LR38516 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .